The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 1994

Filed:

Oct. 09, 1990
Applicant:
Inventors:

Nigel J Allison, Austin, TX (US);

Janice L Benzel, Austin, TX (US);

Joseph F Kowalski, Warren, MI (US);

Assignees:

Motorola, Inc., Schaumburg, IL (US);

Ford Motor Company, Dearborn, MI (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395725 ; 364D / ; 364230 ; 3642302 ; 3642315 ; 3642318 ; 3642412 ; 3642133 ; 3642435 ; 364247 ; 3642475 ; 3642476 ; 3642477 ;
Abstract

A method for servicing peripheral interrupt requests in a data processing system is provided. A state vector register stores a current state of a state machine which controls the interrupt-generating peripheral. In addition, the state vector register simultaneously stores an interrupt source identifier, which indicates the source of the highest priority interrupt request currently pending for the interrupt-generating peripheral. When the processor receives an interrupt request, the value stored in the state vector register of the interrupt-generating peripheral is read into an index register in the processor. The processor then uses the value as an index into a jump table, stored in memory, which contains the interrupt service routines. The use of the state vector register in conjunction with existing internal signals enables the processor to rapidly retrieve the appropriate interrupt service routine from memory, while minimizing the system overhead associated with servicing the interrupt request.


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