The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 1994

Filed:

May. 24, 1991
Applicant:
Inventors:

Shigeo Urushidani, Hachioji, JP;

Koji Sasayama, Iruma, JP;

Jun Nishikido, Kodaira, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
365215 ; 365234 ; 365 64 ; 385 24 ;
Abstract

A FIFO buffer in which respective portions are controlled in a distributed manner is provided. In the FIFO buffer, a number of loop circuits having delay elements are provided in which respective loop circuits are connected to one another in cascade manner. Additionally provided are a number of traffic control units for controlling the signal traffic between respective neighboring loop circuits. In the case where no signal is fed back to a traffic control unit from the output side and also a new signal is transmitted thereto from the input side, the traffic control unit transmits the new signal to the loop circuit which is on the output side. In the case where any signal is fed back to a traffic control unit from the output side and also a new signal is transmitted thereto from the input side, the traffic control unit again transmits the fed-back signal to the loop circuit which is on the output side and transmits the new signal to the loop circuit which is on the input side. In the case where any signal is fed back to a traffic control means from the output side and also no signal is transmitted thereto from the input side, the traffic control means transmits again the fed-back signal to the loop circuit which is on the output side.


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