The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 1994

Filed:

Apr. 22, 1992
Applicant:
Inventor:

Yoshito Nishimichi, Higashiosaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307603 ; 307269 ; 307602 ; 328 55 ; 328 63 ;
Abstract

A timing control circuit to be used for a phase locked loop (PLL) wherein, a plurality of delay circuit elements capable of controlling the delay connected in series are used as a signal delay circuit, delay values of all the delay circuit elements can be changed at the same time with the delay control signals of the respective delay circuit elements being commonly connected, and the delay control signal is controlled so as to select the desired delay with the combination of a selecting circuit, a bi-directional shift register circuit, a phase detecting circuit, a shift control circuit, a delay control circuit so as to realize the wide range of timing control, thereby to provide a function of adjusting the delay of a signal delay circuit for effecting a timing control operation.


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