The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 1994
Filed:
Jan. 21, 1993
Douglas C Wadsworth, Manotick, CA;
Northern Telecom Limited, Montreal, CA;
Abstract
A FET bidirectional switching arrangement comprises first and second FETs, and a limiting arrangement connected to the FETs. The FETs are operable in response to a first bias condition to pass current in series through the FETs in either of two opposite directions, and operable in response to a second bias condtion to block current through the FETs in both of the two opposite directions. The limiting arrangement senses the direction of current flowing through the FETs and limits a forward bias on a first pn junction of the first FET when the current flows in a first direction of the two opposite directions to limit undesired current flow through the first pn junction of the first FET. When the current flows in a second direction of the two opposite directions, the limiting arrangement limits a forward bias on a first pn junction of the second FET to limit undesired current flow through the first pn junction of the second FET.