The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 1994
Filed:
Nov. 12, 1992
Glenn T Haddick, Redwood City, CA (US);
Hewlett-Packard Company, Palo Alto, CA (US);
Abstract
A process for producing defect free multilayer printed circuit boards using low pressure lamination with a cyanate ester laminate. Alternate layers of cyanate ester core and prepreg materials are stacked and at least partially cured under pressure and elevated temperatures to produce a multilayer laminated printed circuit board. The use of a low pressure cure avoids the storage of stress within the laminate. Such stress would otherwise produce microcracking and/or delamination of the circuit board when the stress is released during the subsequent thermal cycling or exposure to caustics attendant with working and reworking of the printed circuit board.