Non-volatile semiconductor memory having double gate structure

Abstract

A double gate non-volatile semiconductor memory comprises a plurality of device isolation regions formed of an insulator material filled into a plurality of trenches formed in a substrate, so that a device formation region is formed between each pair of adjacent device isolation regions. A side wall of an insulator material is formed to cover side surfaces of floating gates and word lines formed on the floating gates, which extend in a direction orthogonal to the direction of the device formation region. Source regions and drain regions are formed by doping impurity into the device formation regions surrounded by the side wall. A plurality of common source lines of a low resistance conductor film are formed each to extend in the orthogonal direction so as to pass on the source regions positioned in each one row of the orthogonal direction. Thus, the word lines are surely isolated from the source lines.