The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 1994
Filed:
Aug. 18, 1992
John J D'Ambrose, Houston, TX (US);
William K Shetterly, Friendswood, TX (US);
Stephen Thompson, Delray Beach, FL (US);
Michael R Turner, Boca Raton, FL (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A hardware-based system for managing multiple input/output devices sharing the same set of addresses in a computer system is described. The new VIRTUAL ENABLED state is a hybrid of the current ENABLED or ACTIVE and DISABLED or INACTIVE states. In the ENABLED state, an input/output (I/O) adapter responds to I/O addressing and presents interrupts to the processor. In the DISABLED state, the I/O adapter does not respond to I/O addressing and does not present interrupts. In the new VIRTUAL ENABLED state, the adapter does not respond to I/O addressing (as in the DISABLED state), but will still produce an interrupt (as in the ENABLED state). With the VIRTUAL state, multiple I/O adapters that would normally content for the same set of addresses (ENABLED state), or optionally be rendered inoperable (DISABLED state), can always remain available for I/O. A single register where the processor can read the interrupt status for all ENABLED and/or VIRTUAL ENABLED adapters sharing the same set of addresses is provided. Other unique registers are also provided to allow the processor to cycle any of the ENABLED and VIRTUAL ENABLED devices between these two states to permit servicing of the interrupt.