The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 1994
Filed:
Mar. 31, 1992
Applicant:
Inventors:
Ataru Shimodaira, Phoenix, AZ (US);
Walter H Potts, Tempe, AZ (US);
Assignee:
VLSI Technology, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395275 ; 395325 ; 395550 ; 364D / ; 3642315 ; 3642362 ; 364238 ; 3642391 ; 364240 ; 3642405 ; 3642423 ; 3642426 ; 3642427 ; 3642472 ; 3642549 ; 364260 ; 3642601 ; 364270 ; 3642702 ; 3642716 ;
Abstract
A computer system includes a bus and a plurality of devices coupled to the bus. A CPU within the bus controller generates addresses for data transfers to and from the devices. A bus controller generates control signals for the data transfers. A data transfer rate controlled by the control signals is varied so that the data transfer rate is optimal for data transfers to and from each device. The data transfer rate for a data transfer to or from a first device is based on a subset of address bits used by the CPU to address the first device.