The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 18, 1994

Filed:

Jun. 08, 1992
Applicant:
Inventors:

Yueh Y Ma, Los Altos, CA (US);

Kuo-Tung Chang, San Jose, CA (US);

Assignee:

Bright Microelectronics, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365185 ; 365218 ; 257314 ; 257316 ;
Abstract

A flash EPROM memory array which operates at lower voltage power supply with no disturbance during operation. The memory circuit comprises a plurality of memory elements in a matrix fashion with each element including a semiconductor substrate, a drain region, a source region, a floating gate, a control gate, and a select gate. The low voltage power supply operation capability is achieved by a special arrangement on the said memory array such that the programming of the memory cell is achieved by high efficient hot electron injection which allows lower drain voltage during programming. No disturbance during program and erase occurs due to a control gate line running in parallel with the drain line. No disturbance access during read operation because of alternating drain and source lines such that the memory device can be read from the source side.


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