The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 1994
Filed:
Jul. 02, 1992
Robert R Livolsi, Shokan, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An ECL off-chip driver for CMOS circuits is composed of three sections. The first section is a CMOS inverter stage which receives an inhibit input. The second section is a CMOS AND gate which receives an enable input and the complemented first from the inverter stage. The third stage is itself composed of two stages, a pre-driver stage and an output driver stage. The pre-driver stage includes a CMOS NAND gate and a CMOS NOR gate both of which receive a data input and, respectively, the output and the complemented output of the AND gate. The driver stage includes first and second drive FETs of complementary type connected to an output terminal, said first drive FET being driven by the NAND gate and the second drive FET being driven by the NOR gate. Feedback FETs sense an output signal level and control the first and second drive FETs to produce ECL compatible voltage levels. The feedback FETs are cross-coupled respectively to the NOR and NAND gates to provide added stability in amplitude regulation.