The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 1994

Filed:

Oct. 30, 1991
Applicant:
Inventor:

Donna C Myers, Kingston, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
371 206 ; 371 572 ; 371 222 ; 324527 ;
Abstract

System speed boundary tests are made on nets interconnecting field programmable logic without any external testing equipment or special printed circuit board layout for such a test. Only a single net interconnecting all field programmable logic in a ring is employed. The tests are made for opens and shorts and localize faults to a particular net. Nets interconnecting field programmable logic are tested utilizing the information stored in the circuit design file and the reprogrammability of the field programmable logic to construct a circuit that is then implemented in the field programmable logic and tests all interconnecting nets.


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