The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 1994

Filed:

Apr. 12, 1991
Applicant:
Inventors:

Owen S Bair, San Jose, CA (US);

Patrick Yin, San Jose, CA (US);

Chih-Chung Chen, San Jose, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364490 ; 364489 ; 364488 ;
Abstract

An automatic logic-model generation system operates on a schematic database and produces logic models incorporating accurate timing information. A verification process is also performed whereby the model is automatically verified for accuracy.


Find Patent Forward Citations

Bair, Owen. (1994). Automatic logic model generation from schematic data base (U.S. Patent No. 5278769). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5278769

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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