The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 1993
Filed:
Sep. 20, 1991
Roland Bechade, South Burlington, VT (US);
Frank D Ferraiolo, New Windsor, NY (US);
Bruce Kaufmann, Jericho, VT (US);
Ilya I Novof, Durham, NC (US);
Steven F Oakland, Colchester, VT (US);
Kenneth Shaw, Essex Junction, VT (US);
Leon Skarshinski, Red Hook, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A process independent digital clock signal timing network is described for generating a chip clock substantially in phase with and offset by one cycle from an input clock signal. The timing network determines the delay experienced by a clock signal passing through a predetermined internal clock circuit on the chip and pregates the internal clock circuit by an amount equivalent to the determined delay such that the chip clock signal output from the internal clock circuitry lags the external clock signal input to the semiconductor chip by one cycle. Various timing network embodiments are described and claimed.