The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 1993

Filed:

Jul. 13, 1990
Applicant:
Inventors:

David C McClure, Carrollton, TX (US);

Thomas A Coker, Irving, TX (US);

Assignee:

SGS-Thomson Microelectronics, Inc., Carrollton, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
371 212 ; 365201 ; 371 681 ;
Abstract

An integrated circuit memory is disclosed which has a parallel test read mode. The memory includes comparators for comparing multiple data words, on a bit-by-bit basis, during the parallel read mode, with the result of the comparison used to enable or disable the output buffers. In test mode, in the event of a failed parallel test comparison, the comparator causes the output buffers to go into a high-impedance state; for a passing parallel test, the actual data state is presented by the output terminals The comparison circuitry is in parallel with the output data path, so that the output data path is not adversely affected by the test circuitry, and so that the access time in test mode is the same as the access time during normal operation (assuming a passing test). The technique may be adapted to wide parallel test schemes.


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