The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 1993

Filed:

Jan. 28, 1993
Applicant:
Inventors:

Junichi Taneda, Tokyo, JP;

Keisuke Okada, Tokyo, JP;

Takumi Hiroto, Tokyo, JP;

Kouichi Hirosawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
29830 ; 29852 ; 156 89 ; 156902 ; 179262 ; 179263 ; 361792 ; 428901 ;
Abstract

In a method for producing a multilayer printed wiring board, first and second copper foils for surface layer are disposed on both sides of an inner wiring substrate so that each of first and second prepreg sheets provided with through-holes is sandwiched between each of the copper foils for surface layer and each face of the substrate, the through-holes being formed therethrough at desired positions corresponding to positions where the connecting pads on each face of the substrate are formed, and the resulting structure is integrally bonded by applying heat and pressure thereto. During the heat- and pressure-processing step, the through-holes within the prepreg sheets are filled with a resin fused from the prepreg sheets. After selectively removing the copper foil for surface layer within an area which matches each of the connecting pads, the resin is selectively removed by the irradiation of laser beams to form via holes and allow the connecting pads to be exposed. Next, a conductive paste is embedded in the via holes. According to the above-mentioned method, it is possible to suppress occurrence of defective in boring of the via hole for electrically connecting circuit patterns of the surface layer to circuit patterns of the inner layer and also to shorten the production term and reduce the production cost.


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