The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 02, 1993
Filed:
May. 15, 1992
Taqi N Buti, Millbrook, NY (US);
Louis L Hsu, Fishkill, NY (US);
Mark E Jost, Fishkill, NY (US);
Seiki Ogura, Hopewell Junction, NY (US);
Ronald N Schulz, Salt Point, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A SOI BiCMOS integrated circuit has CMOS devices formed in a thin epitaxial layer of 1,000 .ANG. and bipolar devices formed in a thick epitaxial layer of 1 .mu.m, the two thicknesses being formed by a process in which a set of oxide islands are formed on a first wafer; an epitaxial layer is grown from bipolar silicon regions up and over the islands in a step that forms the bottom portion of the bipolar regions; the first wafer is inverted and oxide-bonded to a second wafer with the newly grown epitaxial layer below the islands so that the new top surface has a high quality epitaxial layer; excess silicon is removed from the new surface and the surface is polished to a thickness of 1,000 .ANG. over the islands by use of a nitride polish stop layer, leaving a thick layer of epitaxial silicon of 1 .mu.m in the bipolar regions and a 1,000 .ANG. thick layer of epitaxial silicon in the CMOS regions.