The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 1993

Filed:

May. 03, 1991
Applicant:
Inventors:

Lanny L Parker, Mesa, AZ (US);

Ahmad H Atriss, Chandler, AZ (US);

Benjamin C Peterson, Tempe, AZ (US);

Dean W Mueller, Portland, OR (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ;
U.S. Cl.
CPC ...
331 / ; 331D / ;
Abstract

A phase lock loop monitors a first digital signal and generates a second digital signal operating substantially at frequency and in-phase with the first digital signal. The first and second digital signal are applied to a lock detection circuit for generating a first digital output signal having a first logic state from a mutually exclusive combination of the first and second digital signals. The first logic state of the first digital output signal is compared with a time slot window formed by a control signal for generating a true lock detection signal when the first logic state of the first digital output signal occurs within the time slot window and a false lock detection signal when the first logic state of the first digital output signal occurs outside the time slot window.


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