The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 19, 1993

Filed:

Dec. 26, 1991
Applicant:
Inventors:

Hiroaki Tanaka, Yokohama, JP;

Masaru Koyanagi, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365201 ; 365203 ; 365206 ;
Abstract

A dynamic random access memory according to the present invention comprises a voltage stress test pad to which a stress voltage is externally applied when a voltage stress test is carried out, transistors which turn off when the stress voltage is not applied to the voltage stress test pad and which, when the stress voltage is applied thereto, transmit the stress voltage to more word lines than those selected in response to an external address signal in a normal operation mode, and a noise killer control circuit for turning off a noise killer circuit connected to a word line to which the stress voltage is applied when the voltage stress test is carried out.


Find Patent Forward Citations

Tanaka, Hiroaki. (1993). Dynamic random access memory including stress test circuitry (U.S. Patent No. 5255229). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5255229

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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