The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 1993

Filed:

Jul. 31, 1992
Applicant:
Inventors:

Anthony J Fernandes, Villa Park, IL (US);

William P Smead, Palatine, IL (US);

Assignee:

Sears, Roebuck & Co., Hoffman Estates, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G07G / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
395275 ; 235380 ; 902 22 ; 364405 ; 3649185 ; 36492691 ; 36492693 ; 36492797 ; 36492798 ; 36492799 ; 364D / ;
Abstract

A register system for facilitating point of sale transactions of any of a plurality of products, each of the products having a bar code encoded product identification associated therewith, is disclosed. The register system comprises a central computer for storing data representing a sales price for each of the products, a plurality of distributed point of sale registers coupled to the central computer, a bar code reader, operatively associated with each of the registers, for scanning the bar code encoded product identification from the products. Each register is responsive to the scanned product identification and communicates with the central computer for transferring to the register associated with the bar code reader the sales price for the selected one of the products. The register system includes a bidirectional card reader for reading data stored as a plurality of sequential multi-bit characters on a magnetic stripe on a card. The register system further includes a processor having a single I/O port and a circuit for permitting the processor to communicate with a plurality of serial I/O ports.


Find Patent Forward Citations

Loading…