Semiconductor memory ic and semiconductor memory device

Abstract

A semiconductor memory IC including an address value register, an adder and an address difference signal line, wherein an address for operation of the semiconductor memory IC is specified by an address difference signal representing an increment/decrement of the address value register An optional address can be specified by an increment/decrement signal, and all memory cells can be addressed even though the number of terminals is smaller than that required for specifying an absolute value of an address, so that the semiconductor memory IC can be reduced in size. To form a semiconductor memory device by using this semiconductor memory IC, an address memory unit, an address value difference computing unit and an addressing unit are provided. When operating the memory device, a target address in the memory unit can be reached by specifying a difference between the target address and the address held in the address memory unit.