The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 1993

Filed:

Aug. 19, 1991
Applicant:
Inventors:

Atsushi Hatakeyama, Kawasaki, JP;

Masao Nakano, Kawasaki, JP;

Assignee:

Hatakeyama et al., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518906 ; 36523006 ;
Abstract

A semiconductor memory device comprises a memory cell array including a plurality of memory cells, a word line selection circuit for selecting a word line, a bit line selection circuit for selecting a bit line, an input/output circuit for supplying data to be written to a selected memory cell via the selected bit line and for reading data from the selected memory cell via the selected bit line, a word line driver including a MOS transistor having a drain supplied with a supply voltage and a source connected to the word line selection circuit for supplying a word line voltage to the selected word line via the word line selection circuit, a word line boosting circuit connected to the drain of the MOS transistor for boosting the word line voltage via the MOS transistor, a boosting capacitor connected across the source and the gate of the MOS transistor, and a clamping circuit connected to the gate of said MOS transistor for clamping the voltage level at a predetermined level.


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