The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 1993

Filed:

Jan. 09, 1991
Applicant:
Inventors:

Randy L Shimabukuro, San Diego, CA (US);

Michael E Stewart, La Jolla, CA (US);

Patrick A Shoemaker, Lemon Grove, CA (US);

Graham A Garcia, San Diego, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ; G11C / ;
U.S. Cl.
CPC ...
365 45 ; 365149 ; 365185 ; 257320 ;
Abstract

An integrated circuit memory element is capable of storing analog information. The memory value can be increased and decreased incrementally with no knowledge of the current state and may be stored for a long period of time. Analog memory information is stored as an electrical charge on a floating gate structure and modification of this information is accomplished by the use of hot-carrier injection to transport electrons off of as well as onto the floating gate (to erase as well as to program electrically). Charge is written onto and off of the gate by injection capacitors in deep depletion and is accomplished by having the floating gate contiguous with a piece of crystalline p-type silicon, in which a deep-depletion region may be formed so that hot electrons may be ejected from (ejected off of) the floating gate structure through the surrounding insulating oxide, and having the floating gate structure capacitively coupled to a second piece of crystalline silicon from which electrons may be injected onto the floating gate structure. The novelty of the invention resides in the utilization of avalanche injection of electrons onto and off of the floating gate using injection capacitors. This requires far less current and is more symmetric than the original dual polarity MOS analog memory devices of the prior art.


Find Patent Forward Citations

Loading…