The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 1993

Filed:

Sep. 20, 1991
Applicant:
Inventors:

Takashi Miida, Kanagawa, JP;

Tatsuya Hagiwara, Kanagawa, JP;

Yasumasa Hasegawa, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307607 ; 307358 ; 307359 ; 307264 ; 307491 ; 377 58 ; 377 60 ; 330253 ; 330260 ;
Abstract

A CCD amplifier circuit including an active load type source-grounded inverting amplifier circuit which includes a driving MOS transistor, an active load MOS transistor connected to the driving MOS transistor, and a control circuit. The control circuit controls the voltage at the gate electrode of the active load MOS transistor with a control signal of low output impedance which is substantially inversely proportional to the drain-source voltage of the active load MOS transistor and level-shifted by a predetermined voltage. Further, a CCD delay line includes a floating diffusion region of predetermined impurities formed at an end of a charge-coupled device with a gate section having a predetermined fixed gate voltage, and a switched capacitor integrator for detecting the injection charge of the floating diffusion region to detect signal charges transferred to the floating diffusion region from the charge-coupled device. The CCD amplifier circuit is employed as an output circuit of the switched capacitor integrator.


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