The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 1993

Filed:

Mar. 12, 1991
Applicant:
Inventors:

Jamshed H Mirza, Woodstock, NY (US);

Steven W White, Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395425 ; 395400 ; 364D / ; 364229 ; 3642544 ; 364265 ; 3642683 ; 36494492 ; 3649572 ;
Abstract

A memory system for a high performance data processing system comprises a plurality of memory modules. In the preferred embodiment, there are 2.sup.N +1 memory modules. In a specific example, there are 65 such modules. When all 65 modules are enabled, a real-to-physical translation unit generates logical module addresses from 0 to 64 using modulo 65 calculations. Once a module failure is detected, the translation unit maps the real addresses to logical module addresses from 0 to 63 by performing modulo 64 calculations. The contiguous set of logical module addresses are then mapped to a set of physical module addresses which do not include the failed module.


Find Patent Forward Citations

Mirza, Jamshed. (1993). Dynamic memory mapper which supports interleaving across 2.sup.n +1, 2.sup. (U.S. Patent No. 5247645). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5247645

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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