The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 1993

Filed:

May. 11, 1992
Applicant:
Inventors:

Susumu Hoshinouchi, Amagasaki, JP;

Akio Yoshida, Amagasaki, JP;

Akinobu Kawazu, Amagasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G03F / ;
U.S. Cl.
CPC ...
430296 ; 430311 ; 430395 ; 430942 ; 430945 ; 2504923 ;
Abstract

A method of exposing the resist on a printed wiring board having through holes for connecting planar circuit patterns on the plane surfaces of the substrate is disclosed, wherein an electron beam direct writing system is utilized for scanning a converging electron beam as the exposure energy. The electron beam produced by the system enters the opening of the through hole, forming an inclination angle different from 0 degrees and up to 7 degrees with respect to the normal to the opening area of the through hole, such that the resist on the wall surface of the through hole is exposed simultaneously both by the direct and the reflected electron beam. The amount of exposure per unit area of the opening of the through hole may be controlled to 2 h/r times the amount of exposure per unit area over the planar surface of the substrate, wherein h and r are the depth and the radius of the through holes, respectively. A reflector plate may be disposed at the bottom opening of the through holes to further enhance the utilization efficiency of the electron beam during through-hole wall surface exposure.


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