The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 1993

Filed:

Oct. 05, 1990
Applicant:
Inventors:

George J Barlow, Tewksbury, MA (US);

Donald L Smith, Bedford, MA (US);

Assignee:

Bull HN Information Systems Inc., Billerica, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395325 ; 395425 ; 395725 ; 364240 ; 3642405 ; 3642426 ; 3642427 ; 36424292 ; 364264 ; 3642646 ; 3642705 ; 364D / ;
Abstract

A multiprocessor system includes a plurality of central subsystem (CSS) units, a plurality of memory units and input/output units which connect in common to a system bus for transferring requests between a pair of units on a priority basis defined by a distributed bus priority network included as part of the system bus. A private bus (P bus) connects all of the CSS units and memory units in common for high speed block data transfers. Each CSS unit includes input circuits which couple to the priority network for detecting when the system bus is in an idle state. P bus logic circuits couple to the P bus and generate a transfer request in response to a request from its CSS unit only when the P bus is detected to be in an idle state. The idle signals from both buses are used to generate a system bus request for P bus access only when both buses are in an idle state so as to eliminate the need to contend for system bus use.


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