The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 1993

Filed:

Jul. 10, 1992
Applicant:
Inventors:

Hideki Shibata, Yokohama, JP;

Naoki Ikeda, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257748 ; 257750 ; 257754 ; 257758 ; 257760 ; 257763 ; 257764 ; 257774 ; 257797 ;
Abstract

A contact hole in a diffusion region is narrowed by a buffer layer formed at about the middle of an interlayer insulating film in its thickness direction. This buffer layer serves as effective alignment tolerances to the diffusion region and a contact electrode at the time of forming the contact hole. The structure having a wiring conductor filled in the contact hole and having the contact electrode formed on this wiring conductor can assure a highly reliable contact. Forming a buffer layer as a sidewall on this contact electrode and a first wiring layer formed on the same layer can assure an effective alignment tolerance to the first wiring layer at the time of forming a VIA hole. Filling a wiring conductor in the VIA hole can eliminate the need for any contact tolerance for a second wiring layer to be formed on this wiring conductor. Accordingly, the individual contact tolerances can be assured by self-alignment.


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