The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 1993

Filed:

May. 08, 1992
Applicant:
Inventors:

Takashi Fukusho, Kanagawa, JP;

Yoshinori Toshmiya, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 53 ; 437 42 ; 437920 ; 148D / ;
Abstract

A fabrication process includes at least a step of low pressure CVD for depositing an upper silicon oxide layer on a silicon nitride layer which is formed through a lower silicon oxide layer on a silicon substrate, a next step of forming a gate electrode on the second oxide layer, and a further step of selectively removing the second oxide layer and instead forming a similar silicon oxide layer anew. This process can meet the demand for device miniaturization, improve the C-V characteristic of a MOS capacitor and provide uniform insulating layers.


Find Patent Forward Citations

Fukusho, Takashi. (1993). Process for fabricating gate insulating structure of a charge coupled (U.S. Patent No. 5238863). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5238863

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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