The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 1993
Filed:
Nov. 25, 1991
Applicant:
Inventor:
Kenneth E Posse, Fort Collins, CO (US);
Assignee:
Hewlett-Packard Company, Palo Alto, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307468 ; 307475 ; 3072961 ;
Abstract
An on-chip pull-up which can be selectively enabled/disabled comprises a pull-up transistor (e.g., an FET) connected between the line to be pulled up/down and a bias voltage (e.g., a positive voltage V.sub.DD or a negative voltage V.sub.SS). The control lead (e.g., gate lead) of the transistor is then made externally accessible. Connecting the control lead to V.sub.DD or V.sub.SS either enables or disables the pull-up depending on the particular transistor.
Posse, Kenneth. (1993). On-chip pull-up circuit which may be selectively disabled (U.S. Patent No. 5237221). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5237221
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile