The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 1993

Filed:

Apr. 28, 1992
Applicant:
Inventors:

Shin-Ichiro Hayano, Tokyo, JP;

Osamu Matsuda, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307455 ; 307443 ; 307446 ; 307310 ;
Abstract

A negative-phase output signal in an ECL circuit is extracted by an emitter-follower circuit, and the extracted signal is differentiated at its leading edge by a capacitor driven by the emitter-follower circuit so as to form a pulse wave, thus the differentiated signal drives a transistor connected in parallel with an emitter-follower resistor to which a positive-phase output signal is supplied. With this operation, a large amount of current flows only at the trailing edge of the output signal to shorten the fall time of the output from the logic circuit.


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Hayano, Shin-Ichiro. (1993). High-speed cml push-pull logic circuit having temperature compensated (U.S. Patent No. 5237216). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5237216

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