Process for forming bipolar transistor structure

Abstract

A bi-polar transistor structure in a superhigh speed logic integrated circuit, and a process for producing the same are disclosed. The transistor has a substantially coaxial symmetric structure. Single crystal active layers as base and collector regions have peripheries surrounded wholly or partially by respective polycrystalline electrode layers. The polysilicon electrodes have lateral portions and downward depending portions that connect to single crystal layers. The polycrystalline electrode layers are separated from each other by insulation. One process for producing the structure uses only thin film forming techniques and etching techniques to dispose the active layers, an emitter electrode layer, parts of the other electrode layers and parts of the insulating layers inside a recess formed in an insulating layer formed on a substrate. Another process uses a photoetching technique by which polycrystalline layers for base and collector electrodes are patterned. Around the patterned polycrystalline electrode, side wall insulating layers are formed in the respective later steps.