The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 1993

Filed:

Mar. 08, 1991
Applicant:
Inventors:

Hiroshi Katakura, Kawasaki, JP;

Makoto Yoshida, Kawasaki, JP;

Masayuki Kokado, Machida, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324 731 ; 3241 / ; 371 226 ;
Abstract

A semiconductor integrated circuit device includes an array of a plurality of basic circuits, and a test circuit which tests a logic circuit formed of at least one of the basic circuits. The test circuit includes a plurality of select lines, a plurality of read lines, and a plurality of switching circuits. Each of the switching circuits has a first bipolar transistor having a base coupled to at least one test point of the corresponding basic circuit, a collector and an emitter both connectable to connect the test point to a corresponding one of the read lines when a corresponding one of the switching circuits is turned ON in response to a select signal supplied via a corresponding one of the select lines. The test circuit also includes a select line selecting circuit for selecting one of the select lines and for outputting the select signal to a selected one of the select lines. The select signal turns ON selected first bipolar transistors among the plurality of first bipolar transistors. The selected first bipolar transistors are connected to the selected one of the select lines. The test circuit further includes a test data outputting circuit for detecting a change in a predetermined parameter related to each of the read lines and for outputting, as test data indicating information about the test point, the change to a monitor output terminal.


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