The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 27, 1993
Filed:
Mar. 12, 1992
Geoffrey S Gongwer, San Jose, CA (US);
Jinglun Tam, Milpitas, CA (US);
Keith H Gudger, Sunnyvale, CA (US);
Joe Yu, Palo Alto, CA (US);
Steven A Sharp, Los Gatos, CA (US);
Atmel Corporation, San Jose, CA (US);
Abstract
An integrated circuit package including a plurality of macrocells for connecting a logic circuit of the package to a plurality of external contacts of the package. At least one of the macrocells has an output driver that is enabled or disabled by a control signal for transmitting or preventing transmission of a logic signal to one of the contacts. The control signal is generated by a logic gate that receives and logically combines an individual output enable signal dedicated to that particular macrocell with a selected signal. One signal that may be selected is a regional output enable signal that is supplied to more than one macrocell. Each macrocell also has a feedback multiplexer selecting one signal to be sent to the logic circuit. Choices include a nonstored logic signal, a stored logic signal from a flip-flop register in the macrocell, a signal applied to the external contact associated with that macrocell, and a signal applied to another external contact associated with a different macrocell. A plurality of contacts are connected to feedback multiplexers in two different macrocells, and at least one contact connects in this manner to separate logic regions of the logic circuit. The flip-flop register in the macrocell has a choice of data inputs selected by another multiplexer from among at least one logic signal from the logic circuit and at least one signal applied to an external contact.