The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 27, 1993
Filed:
Jul. 10, 1992
Applicant:
Inventor:
Allen L Solomon, Fullerton, CA (US);
Assignee:
Grumman Aerospace Corporation, Bethpage, NY (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H05K / ;
U.S. Cl.
CPC ...
257684 ; 257686 ; 257692 ; 257723 ;
Abstract
A stacked integrated circuit assembly [and method of fabricating the same are disclosed. The assembly] includes a plurality of insulating substrate layers each supporting one or more embedded integrated circuit chips. The substrates each incorporate substantially identical conductive patterns formed on the insulating layer surface and/or on an insulating film that covers the substrate.
Quick Actions:
Solomon, Allen. (1993). Framed chip hybrid stacked layer assembly (U.S. Patent No. 5231304). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5231304
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile