The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 1993

Filed:

Jun. 05, 1991
Applicant:
Inventor:

Moriyoshi Nakashima, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257773 ; 257774 ; 257775 ; 257776 ;
Abstract

The semiconductor device includes a silicon substrate, a conductor thin film formed over the surface of the silicon substrate with a first insulating film interposed therebetween, a second insulating film covering the upper surface of the conductor thin film, and an interconnection layer formed on the second insulating film. A contact hole is formed in the second insulating film and the conductor thin film and the interconnection layer are electrically connected to each other through the contact hole. An insulator layer or a conductor layer in an electrically floating state is selectively formed between the conductor thin film and the surface of the silicon substrate at least immediately below the contact hole. The semiconductor device is formed, for example, by selectively forming a conductor layer on the first insulating film, covering the exposed surface thereof with an insulating film, and then depositing the conductor thin film. In accordance with the semiconductor device and the manufacturing method thereof, even if the conductor thin film is penetrated by an anisotropic etching at the time of forming the contact hole, insulation between the silicon substrate and the conductor thin film is ensured without fail, and a highly reliable semiconductor device can be provided with high productivity, having no defect due to dielectric breakdown.


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