The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 1993

Filed:

Jan. 25, 1991
Applicant:
Inventor:

Nobuyuki Ikumi, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G11C / ;
U.S. Cl.
CPC ...
395425 ; 36523005 ; 364D / ; 36424341 ; 3642448 ; 3649659 ;
Abstract

A multiport cache memory control unit includes a central processing unit having N arithmetic units for executing arithmetic processing, a tag memory having N address ports for storing addresses, a multiport cache memory having N data ports for storing pieces of data at addresses which agree with the addresses stored in the tag memory, and a snoop address port through which a snoop operation is executed to detect an address signal. Arithmetic processing is executed in each of the arithmetic units by reading a piece of data from the cache memory after providing an address signal to the tag memory to check whether or not the data is stored in the cache memory. In cases where a cache miss occurs, a piece of data stored in a main memory unit is fetched through the snoop address port without halting the arithmetic processing. In cases where a snoop hit occurs, an address signal provided from another control unit is transmitted to the tag memory through the snoop address port without halting the arithmetic processing.


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