The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 1993
Filed:
Mar. 05, 1991
Takeshi Yamakawa, Kikuchi, JP;
Omron Tateisi Electronics Co., Kyoto, JP;
Abstract
A multivalued Arithmetic Logic Unit (ALU) is composed of a multivalued signal source, a memory array, a selection array, an AND array and an output circuit. The multivalued signal source generates signals each of which represents a logic value of multivalued logic. The memory array is provided with an address line group for each and every function to be inplemented, each address line group comprising a number of address lines. Which multivalued logic signals will appear on the address lines of each address line group depends upon a program based on the truth table of the corresponding function. Any one of the plural address line groups is selected by the selection array, to which a signal designating the function to be implemented is applied. One address line in the selected address line group is selected by the AND array, which has an input signal applied thereto, and the logic value signal on the selected line is delivered via the output circuit.