The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 1993

Filed:

Mar. 11, 1992
Applicant:
Inventors:

Kazuya Fujimoto, Tenri, JP;

Yuichi Satoh, Mie, JP;

Setsufumi Kamuro, Matsudo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 51 ; 437173 ; 437195 ;
Abstract

A gate array is provided which includes a semiconductor substrate having a main surface. The main surface includes a cell region and a channel region adjacent to the cell region. A cell column including a plurality of basic cells arranged regularly is provided in the cell region. A first interconnecting line is provided in the channel region for connecting the basic cells. In accordance with the gate array, as the first interconnecting line is formed in the channel region in advance for connecting the basic cells, it is not necessary to form a first interconnecting line when manufacturing a semiconductor integrated circuit device. Accordingly, the time period for development of a semiconductor integrated circuit device can be reduced as compared with a case where conventional basic cells are used.


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