The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 1993

Filed:

Oct. 22, 1992
Applicant:
Inventors:

Joseph S Glider, Palo Alto, CA (US);

Kaushik S Shah, Santa Clara, CA (US);

Edward E Asato, Sunnyvale, CA (US);

Assignee:

Micro Technology, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518904 ; 36523001 ;
Abstract

A memory system having multiple memories and multiple ports. Multiplexing logic couples each of the ports to each of the memories. A sequencing circuit controls the multiplexers so that each port is sequentially coupled to each of the memories in sequence in a repeating cycle. When coupled to each memory, a block of data is transferred. A second port is coupled to a different memory at each point in time, with the two ports being switched simultaneously to avoid overlap. A port desiring access to the system must wait until it can fit into this switching queue so that it can transfer in lock-step with the other ports to a different memory. Each port has a data I/O bus, an address input bus, an address counter and R/W controls.


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