The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 1993
Filed:
Apr. 19, 1991
Kouji Gotou, Hyogo, JP;
Kazuya Ishihara, Hyogo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A main bus and a plurality of sub buses constitute a hierarchical bus. A signal transmission circuit is connected between the main bus and each of the plurality of sub buses. The main bus and the plurality of sub buses are precharged to a predetermined potential. The signal transmission circuit discharges a corresponding sub bus or causes the potential of the sub bus to be maintained in accordance with the potential of the main bus when a first enable signal is at a first logic level. The signal transmission circuit causes the potential of a corresponding sub bus to be maintained when a first enable signal is at a second logic level. The signal transmission circuit discharges the main bus or causes the potential of the main bus to be maintained in accordance with the potential of a corresponding sub bus when a second enable signal is at a first logic level. The signal transmission circuit causes the potential of the main bus to be maintained when a second enable signal is at a second logic level.