The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 1993

Filed:

May. 28, 1991
Applicant:
Inventors:

Tsutomu Nomoto, Tokyo, JP;

Masumi Koizumi, Tokyo, JP;

Akihiko Nishiki, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437 49 ; 437909 ; 20419217 ;
Abstract

A TFT matrix for an active matrix display panel has a plurality of TFTs arranged in rows and columns to form a matrix array. Each of the TFT has a control electrode on a dielectric substrate, a first insulator film formed on the control electrode, a second insulator film formed on the first insulator film, a-Si semiconductor layer formed on the second insulator film, and first and second (drain and source) electrodes formed on the a-Si semiconductor layer. The matrix has a plurality of transparent electrodes that contact the second electrodes, row interconnection layers interconnecting the control electrodes of the TFTs of the respective rows, and column interconnection layers interconnecting the first electrodes of the TFTs of the respective columns. The control electrodes and the row interconnection layers (gate electrodes) are made of an alloy of tantalum with tungsten, nickel, cobalt, rhodium, or iridium. The first insulator is formed by anodizing the surface of the gate electrode. The gate electrode has low resistance, improving the quality of the display without impairing insulation performance.


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