Synchronized scanning at horizontal frequency

Abstract

A first phase locked loop generates a first timing signal at a first horizontal synchronizing frequency corresponding to a horizontal synchronizing component in a video signal. A converter circuit derives from the first timing signal a second timing signal, having a second frequency at a multiple of the first frequency and subject to a variation in frequency at a rate corresponding to the first frequency. A second phase locked loop comprises a comparator, a low pass filter, a controllable oscillator and a horizontal output deflection stage receives the second timing signal, which can be asymmetric within the period of the first timing signal, and a feedback signal in accordance with the second frequency. The controllable oscillator generates a horizontal synchronizing signal at the second frequency. The second phase locked loop has a characteristic loop response, determined by the low pass filter, preventing the controllable oscillator from changing frequency as fast as the rate of variation of the second timing signal. This drives the error signal for the controllable oscillator toward an average value, resulting in a corrected, symmetric synchronizing signal at the second frequency. The horizontal output deflection stage is synchronized for horizontal scanning in accordance with the second frequency. No additional signal processing circuitry is needed to correct the symmetry of the first timing signal generated by the first phase locked loop or the symmetry of the second timing signal derived by the converter.