The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 1993
Filed:
Sep. 15, 1992
Applicant:
Inventor:
Manohar L Malwah, Los Altos Hills, CA (US);
Assignee:
Quality Semiconductor Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437200 ; 437 56 ; 437 57 ; 437193 ;
Abstract
A metal silicide layer in or on a body of silicon wafer is used for interconnecting two or more CMOS circuit devices. In addition to a polysilicon layer and a metal layer, the metal silicide layer provides an additional layer of local interconnect which can be performed at high density to reduce the size of the die while including the same number of circuit devices. An amorphous silicon layer doped at selected regions may be used as an additional interconnect.