The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 1993
Filed:
Aug. 03, 1988
Matthew F Chisholm, Oak Ridge, TN (US);
Peter D Kirchner, Putnam Valley, NY (US);
Alan C Warren, Peekskill, NY (US);
Jerry M Woodall, Bedford, NY (US);
International Business Machines, Corp., Armonk, NY (US);
Abstract
Heterostructures having a large lattice mismatch between an upper epilayer and a substrate and a method of forming such structures having a thin intermediate layer are disclosed. The strain due to a lattice mismatch between the intermediate layer and the substrate is partially relieved by the formation of edge type dislocations which are localized and photoelectrically inactive. Growth of the intermediate layer is interrupted before it reaches the thickness at which the left over strain is relieved by 60 degree type threading dislocations. The upper epilayer is then grown in an unstrained and defect-free condition upon the intermediate layer where the unstrained lattice constant of the epilayer is about the same as the partially relieved strain lattice constant or the intermediate layer. An unstrained defect-free epilayer of InGaAs has been grown on a GaAs substrate with an intermediate layer 3-10 nm in thickness of InAs. Other large mismatch systems are disclosed, including, GaAs on Si with an intermediate layer of GaInAs.