The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 15, 1993
Filed:
Apr. 03, 1992
David M Dickirson, Boca Raton, FL (US);
Ralph E Digiacomo, Jr, Tamarac, FL (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A printed circuit substrate interconnection is made between two printed circuit substrates. A first printed circuit substrate (10) is a laminate of at least two dielectric layers (12, 14), and has a first circuit pattern (16) disposed between the two layers. The circuit pattern terminates in one or more lands or pads (17) located near a vertical edge (13) of the layer. The second dielectric layer is laminated to the first layer, over the circuit pattern, so as to reveal the lands. A second printed circuit substrate (20) is a laminate of at least one dielectric layer (22), and has a second circuit pattern (26) terminating in one or more lands or pads (27) located near a vertical edge (23) of the layer, and in a pattern corresponding to the lands of the first circuit pattern. The first printed circuit substrated (10) is coupled to the second printed circuit substrate (20) so as to co-operatively mate the two printed circuit substrates, forming an electrical interconnection between the first circuit pattern lands (17) and the second circuit pattern lands (27).