The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 01, 1993
Filed:
Feb. 13, 1992
Frank M Wanlass, Sunnyvale, CA (US);
Standard Microsystems Corporation, Hauppauge, NY (US);
Abstract
A lower power, noise rejecting TTL-to-CMOS input buffer, without the use of a current consuming voltage reference, has the characteristic of recognizing a logic LOW as less than 0.8 volts and a logic HIGH as greater than 2.0 volts for DC TTL signals while drawing only leakage current from its Vcc power supply, and simultaneously possesses the characteristic of rejecting high-amplitude Vin noise. For an input signal rapidly rising from zero to three volts, the buffer output switches at an input signal level of approximately 2.5 volts; and for the input signal rapidly falling from 3 to zero volts, the buffer output switches at an input signal level of approximately 1.4 volts.