The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 1993
Filed:
Jul. 10, 1990
Koji Takeda, Suwa, JP;
Seiko Epson Corporation, , JP;
Abstract
A memory apparatus has a W(1+J/N) (words).times.D (bits) configuration employing (N+J) semiconductor memory units having (N+J) W (words).times.B (bits) semiconductor memory elements wherein N=D/B=2.sup.d-b and J is a positive integer wherein J<N; W=2.sup.w and w is a positive integer; and B=2.sup.b where b is zero or a positive integer satisfying b<d. For example, five 256K.times.4 1M DRAMs are employed so that four out of five DRAMs always correspond to access from a microprocessor. Furthermore, a 640-Kbyte memory address space is equally divided into five 128-Kbyte memory address areas and the correspondence between the 128-Kbyte memory address areas and four out of the five DRAMs is regularly determined in turn, thereby constituting a 640-Kbyte memory apparatus (320 Kwords.times.16 bits) employing only 1M DRAMs. More particularly, a memory capacity can be set in relatively small units, i.e., in units of W.multidot.J/N words.times.D bits by employing only semiconductor memory units of a single type.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile