Electrostatic discharge clamp using vertical npn transistor

Abstract

An electrostatic discharge protection clamp particularly useful for with bipolar and biCMOS integrated circuits include an NPN transistor formed in an isolated tub in an epitaxial layer grown on a substrate. The collector of the NPN transistor is connected to the input terminal, and the emitter of the NPN transistor is connected to the substrate. A resistor interconnects the base and the emitter. Advantageously, the P-doped base can abut the P-doped isolation region forming the tub, and the P-doped isolation region can interconnect the emitter to the substrate. Below BV.sub.CES the clamp will look like an open circuit, and above BV.sub.CES the transistor will start conducting current. The transistor will break down collector to base. Conduction of the transistor causes a voltage drop across the base-emitter junction, and when this voltage drop exceeds the base-emitter forward voltage the transistor will turn on. Once the transistor is turned on and current starts flowing in the emitter, avalanche effects will cause the breakdown voltage to snap back to BV.sub.CEO and remain there until the emitter current drops below some low level, which will be at the end of the electrostatic discharge pulse. In the negative direction the tub to substrate diode provides an effective clamp which will clamp the voltage to a low value and limit the power dissipation in the junction. Alternatively, a bidirectional clamp can be provided in which a second NPN transistor is fabricated in the tub with the emitter of the second transistor connected to the input terminal and the collectors of the two transistors being interconnected by the N-doped epitaxial layer of the tub. The dopant conductivities can be reversed.