The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 1993

Filed:

Sep. 03, 1991
Applicant:
Inventors:

Thomas J Kovalcik, Barrington, NH (US);

Paul W Latham, II, Durham, NH (US);

Assignee:

Allegro Microsystems, Inc., Worcester, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F / ;
U.S. Cl.
CPC ...
330261 ; 330253 ; 330257 ; 3072962 ;
Abstract

An amplifier has a first stage employing a pair of differentially connected NMOS amplifier transistors, a second stage composed of a bipolar current mirror circuit and two charge pumps. Each charge pump may be a switching voltage multiplier circuit without the conventional output capacitor. The outputs of the two charge pumps are connected, respectively, to the collector of the current-mirror output transistor and to the commonly connected sources of the NMOS amplifier transistors. Each charge pump serves as both a pulse-voltage energizing source and a load to the amplifier. The amplifier is incorporated with a high-current NMOS transistor in an integrated circuit, wherein one differential input of the amplifier is connected to the source of the driver transistor at which an external load, e.g. a motor, may be connected. The output (collector) of the differential amplifier is connected to the gate of the NMOS driver transistor so that the load current through the driver transistor is held regulated to a value proportional to the input or reference voltage that is applied to the other input of the differential amplifier. The peak pulse voltage of each charge pump is greater than the DC supply voltage from which the driver transistor and the two charge pumps are energized so that the dynamic range of both the input control voltage and the amplifier output to the gate of the NMOS driver transistor is much greater than the DC supply voltage to the integrated circuit.


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