The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 1993

Filed:

Feb. 26, 1992
Applicant:
Inventors:

David Rossmere, San Jose, CA (US);

Patrice Capitant, Los Altos, CA (US);

Assignee:

Sony Corporation of America, Park Ridge, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364786 ;
Abstract

A method and apparatus for quickly adding at least three multi-bit binary numbers. The addition is divided into two stages. In Stage I, each of the addends are grouped into like-ordered multi-bit clusters and the corresponding clusters of the addends are added together using Programmable Read Only Memory (PROM) integrated circuits (ICs) yielding several intermediate sums. In Stage II, the intermediate sums are combined to yield a final sum using Programmable Array Logic (PAL, is a trademark of Monolithic Memories, Inc.) ICs. Furthermore, the final sum is rounded in Stage I (and clipped if necessary in a third stage) before being provided as output. Clipping is achieved by setting the output sum to zero if the final sum is negative and setting the output sum to a predetermined threshold value if the final sum exceeds the threshold value.


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